A. Field of The Invention
This invention relates to matrix type liquid crystal display devices, and more particularly to a method of driving a matrix type liquid crystal display device in which each of the picture elements in the matrix type display pattern is provided with a thin film transistor.
B. Description Of the Prior Art
In a matrix type liquid crystal display with thin film transistors, the thin film transistors are provided in the liquid crystal display panel and the device can produce a high contrast display even when it is driven at a low duty ratio or duty cycle in a multiple-line multiplex driving mode. A generally well-known matrix type liquid crystal display device is shown in FIG. 1. In FIG. 1, thin film transistors 11 are connected to display picture element electrodes 12 via the drain electrodes of the thin film transistors 11. Line electrodes 13 are connected to the gate electrodes 25 of the thin film transistors 11 and column electrodes 14 are connected to the source electrodes 26 of the thin film transistors. Insulating films 15 insulate the line electrodes 13 from the column electrodes 14. These line (row) and column electrodes 13 and 14 are formed between the picture element electrodes 12.
The principles of operation of the above-described liquid crystal display device will be described with reference to an equivalent circuit diagram (FIG. 2) and a drive signal waveform diagram (FIG. 3). The liquid crystal display device described below employs, for example, n-channel type thin film transistors. In the case of p-channel type thin film transistors, the polarity of the scanning signal waveform is inverted. A scanning signal, as illustrated in FIGS. 3(a) or 3(b), is applied to gate electrodes 25 (FIG. 2) via the line electrode 21 to turn on the transistors 22 for a certain period of time. FIGS. 3(a) and 3(b) depict the signals which are applied to line electrodes (i) and (i+1), respectively. A data waveform signal, as illustrated in FIG. 3(c), is applied to the source electrodes 26 of the thin film transistors 22 (FIG. 2) via the column electrodes 23. The data signal voltage is raised to the value V for the time period necessary to scan a line of liquid crystals to be turned on, and it is returned to zero volts for the time period necessary to scan a line of liquid crystals to be turned off. The polarity of the voltage V changes, every time when a scanning signal is applied to the gate electrode when an AC type driving waveform is employed. FIG. 3(c) illustrates such a signal as applied to column electrode (j), and, in this case, the picture element at the intersection of column (i) and line (j) is turned on, while the picture elements connected to the other line remain off. In FIG. 2, the liquid crystals have capacitances 24 between the display picture element electrode 12, connected to the drain electrode 27 of the thin film transistor, and the counter electrode held at zero volts.
The picture element at the intersection of line (i) and column (j) will be described with reference to FIG. 2. When the thin film transistor 22 is turned on, a charge is applied to the capacitance 24 of the liquid crystal 12 from the column electrode through the transistor 22, and the potential of the display picture element electrode 12 is raised to +V which is a voltage equal to that of the data signal. When the transistor 22 is turned off, the charge remains on the capacitance 24 of the liquid crystal and the potential of the display picture element electrodes is maintained at +V. When the transistor 22 is turned on again, the capacitance 24 of the liquid crystal is negatively charged until the potential of the display picture element electrode 112 is -V, and the charge on the capacitance 24 is maintained for the period of time during which the transistor is kept nonconductive. Thus, a signal as shown in FIG. 3(d) is applied to the display picture element electrode, and the liquid crystal is turned on.
The operation of the picture element at the intersection of line (i+1) and column (j) will be described with respect to the description of the picture element at the intersection of line (i) in column (j). In this case, the operation is the same as the case described above, except that the voltage of the data signal is zero volt. When the display picture element electrode 12 at the intersection of line (i+1) and column (j) is maintained at zero volts, as is shown in FIG. 3(e), no voltage is applied to the liquid crystal, and accordingly the liquid crystal remains off.
As is apparent from the above description, during the operation of the above-described liquid crystal display device, even though multiplex driving is carried out, the voltage applied to the liquid crystal is equivlent to a static driving voltage.
In the above-described liquid crystal display device, the line electrodes 13 and column electrodes 14 are a metal such as aluminum or nickel, or a transparent conductive film. Because light cannot pass through the metal, the electrode width should be as small as possible but within a range limited by patterning accuracy and high device yield. In some cases the resistance of each electrode will be high enough so that it cannot be disregarded. Where the line and column electrodes are a transparent conductive film, they have a sheet resistance of 10 .OMEGA./.quadrature. even if the transparent conductive film is of the highest quality. Increasing the electrode width to reduce the resistance is undesirable, because an undesirable decrease in the area of the display picture element electrodes results. Therefore, in this case, it is difficult to make the resistances of the line and column electrodes sufficiently small.
If the line electrodes 13 and the column electrodes 14 have such a high resistance as described above, the electrode resistance coupled with the load capacitance 24, connected to the electrodes, and other stray capacitances distort the applied voltagae waveform. For example, when a waveform signal, as depicted in FIG. 4(a), is applied to the electrode, it is distorted by the electrode resistance and the capacitance, as illustrated in FIG. 4(b). The distorted waveform of FIG. 4(b) is equivalent to the original signal (FIG. 4(a)) delayed by a time t.sub.1 as illustrated in FIG. 4(c).
The effect of the delayed waveform on the display when the liquid crystal display device is driven, will be described with reference to FIG. 5. FIGS. 5(a) and 5(b ) depict an original scanning signal and a delayed scanning signal, respectively. When the scanning signal lags behind the data signal, as illustrated in FIGS. 5(b ) and 5(c) during scanning of the picture element at the intersection of line (i) and column (j), the transistor 22 rendered conductive, the capacitance 24 associated therewith is charged to +V volts. However, before the transistor 22 is turned off, the data signal is changed from +V to zero volts and the capacitance 24 thus discharges. Accordingly, the potential of the display picture element electrode 12 when the transistor is turned off becomes smaller than +V, as illustrated in FIG. 5(e). This voltage drop is increased in accordance with the length of the delay. In other words, the voltage drop increases as the electrode resistance and capacitance associated with the circuit gets higher. In a case where the display content is such that the picture elements on line (i +1) are also turned on, no voltage drop occurs. Similarly, the picture element at the intersection of line (i-1) and column (j) which is to be held at zero volts is charged to a voltage +V.sub.2, as illustrated in FIG. 5(f). When the timing of the scanning signal is delayed by the electrode resistance and capacitance, as described above, the voltage applied to each picture element changes according to or is dependent on the display content. Since the magnitude of the change depends on the positions in the display which are turned on, the display contrast is not uniform.
Now, let us consider the case where the data signal lags behind the scanning signal with reference to FIGS. 5(a) and 5(d). In this case, the picture element at the intersection of line (i) and column (j), is charged to zero volts, which is the data intended for line (i-1), when the transistors is turned on and then to +V the data intended for line (i) and column (j). If, in this case, the driving condition permits quick charging through the transistor 22, then no problems will arise, and picture element electrode is charged to +V, as illlustrated in FIG. 5(g). Howevaer, when the charging period is longer than the scanning period H, the picture element, which should be charged to +V, as illustrated in FIG. 5(h), is chargaed only to an intermediate level +V.sub.3, as shown in FIG. 6(i), and therefore the display contrast is once again not uniform.